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DESCRIPTION
The 4N39 and 4N40 have a gallium-arsenide infrared emitting diode optically coupled with a light activated silicon controlled rectifier in a dual in-line package.
4N39
4N40
FEATURES
* * * * 10 A, T2L compatible, solid state relay 25 W logic indicator lamp driver 400 V symmetrical transistor coupler Underwriters Laboratory (UL) recognized File #E90700
6 1
6
SCHEMATIC
1
ANODE 1 6 GATE
APPLICATIONS
* * * * * Low power logic circuits 6 Telecommunications equipment Portable electronics Solid state relays Interfacing coupling systems of different potentials and impedances.
CATHODE 2 5 ANODE
1
N/C 3
4 CATHODE
Parameter TOTAL DEVICE *Storage Temperature *Operating Temperature *Lead Solder Temperature *Total Device Power Dissipation (-55C to 50 C) Derate above 50C EMITTER *Continuous Forward Current *Reverse Voltage *Forward Current - Peak (300 s, 2% Duty Cycle) *LED Power Dissipation (-55C to 50 C) Derate above 50C DETECTOR *Off-State And Reverse Voltage *Peak Reverse Gate Voltage *Direct On-State Current *Surge On-State Current (100 s) *Peak Gate Current *Detector Power Dissipation (-55C to 50C) Derate above 50C Note * Indicates JEDEC Registered Data ** Typical values at TA = 25C
Symbol TSTG TOPR TSOL PD IF VR IF(pk) PD
Device All All All All All All All All
Value -55 to +150 -55 to +100 260 for 10 sec 450 9.0 60 6 1.0 100 2.0 200 400 6 300 10 10 400 8.0
Units C C C mW mW/C mA V A mW mW/C V V V mA A mA mW mW/C
4N39 4N40
PD
All
2001 Fairchild Semiconductor Corporation DS300381 2/27/01
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4N39
4N40
ELECTRICAL CHARACTERISTICS
(TA = 25C Unless otherwise specified.)
INDIVIDUAL COMPONENT CHARACTERISTICS
Parameter EMITTER Input Forward Voltage Reverse Leakage Current Capacitance DETECTOR Peak Off-State Voltage Peak Reverse Voltage On-State Voltage Off-State Current Reverse Current Holding Current RGK = 10 k, TA=100 C TA=100 C IT = 300 mA VDM = 200 V, TA = 100 C, IF = 0 mA, RGK = 10 k VR = 200 V, TA=100 C, IF = 0 mA VFx = 50V, RGK = 27 k VDM VRM VT IDM IR IH 4N39 4N40 4N39 4N40 All 4N39 4N40 4N39 4N40 All 200 400 200 400 1.3 50 150 50 150 1.0 V V V A A mA IF = 10 mA VR = 3 V VF = 0 V, f = 1.0 MHz VF IR CJ All All All 50 1.1 1.5 10 V A pF Test Conditions Symbol Device Min Typ** Max Unit
TRANSFER CHARACTERISTICS
Characteristics *Input Current to Trigger *Turn-On Time Package Capacitance (input to output) Coupled dv/dt, input to output (figure 13)
(TA = 25C Unless otherwise specified.) Symbol IFT ton CI-O dV/dt Device 4N39 4N40 ALL ALL ALL 500 Min Typ** Max 30 14 50 2 Units mA A pF V/S
Test Conditions VAK = 50 V, RGK = 10 k VAK = 100 V, RGK = 27 k VAK = 50 V, IF = 30 mA RGK = 10 k, RL = 200 f = 1 MHz Input to Output Voltage = 0
ISOLATION CHARACTERISTICS
Characteristic *Input-Output Isolation Voltage *Isolation Resistance Isolation Capacitance Note * Indicates JEDEC Registered Data ** Typical values at TA = 25C Test Conditions ( II-0 1 A, Vrms, t = 1 min.) (VI-O = 500 VDC) (VI-O = , f = 1 MHz) Symbol VISO RISO CISO Min 5300 1011 0.8 Typ** Max Units Vac(rms) ! pf
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4N39
Figure 1. Input Current To Trigger vs. Anode-Cathode Voltage
12 IFT - NORMALIZED INPUT CURRENT TO TRIGGER 50 IFT - NORMALIZED INPUT CURRENT TO TRIGGER
NORMALIZED TO VAK = 50V RGK = 10K TA = 25C
4N40
Figure 2. Input Current To Trigger vs. Temperature
10 8 6 4 2
RGK = 300
10 5
RGK = 300 1K
1K
1 .5
10K 27K 56K
1 .8 .6 .4
10K
27K 56K NORMALIZED TO VAK = 50V RGK = 10K TA = 25C
.2 .1 -60
.1 1 5 10 50 100 200 400 VAK - ANODE TO CATHODE VOLTAGE (VOLTS)
-40
-20
0
20
40
60
80
100
120
TA - AMBIENT TEMPERATURE (C)
Figure 3. Input Current To Trigger Distribution vs. Temperature
10 IFT - NORMALIZED INPUT CURRENT TO TRIGGER 8 6 IFT - NORMALIZED INPUT CURRENT TO TRIGGER 4 100
Figure 4. Input Current To Trigger vs. Pluse Width
NORMALIZED TO VAK = 50V RGK = 10K TA = 25C RGK = 300
40 20 10 8 6 4 2
2
1K
90 TH PERCENTILE
NORMALIZED TO VAK = 50V RGK = 10K TA = 25C
1 .8 .6 .4
10 TH PERCENTILE
10K
1 .8 .6 .4 .2 .1
27K 56K
.2
1
2
4
6 8 10
20
40 60 100 200
400
1000
PULSE WIDTH (MICRO SECONDS)
.1
-40
-20
0
20
40
60
80
100
Figure 6. Input Characteristics IF vs. VF
TA - AMBIENT TEMPERATURE (C) 1000
Figure 5. Turn-On Time vs. Input Current
24 ton - TURN ON TIME (MICROSECONDS) 22 20 18 16 14 12 10 8 6 4 2 10 20 30 40 50 60 70 80 90 100
56K 10K RGK = 1K VAK = 50V ton = td + Ir tr 1S
IF - FORWARD CURRENT (MILLIAMPERES)
100
10
1
0
.01
.001 0.5 1.0 2.0 3.0 VAK - FORWARD VOLTAGE (VOLTS)
IF - INPUT CURRENT (MILLIAMPERES)
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4N39
TRANSIENT THERMAL IMPEDANCE (C PER WATT)
4N40
Figure 7. Holding Current vs. Temperature
10,000 IM - HOLDING CURRENT (MICROAMPERES) IFT - NORMALIZED INPUT CURRENT TO TRIGGER 5,000
RGK = 300
Figure 8. Maximum Transient Thermal Impedance
1000 600 400 200 100 60 40 20 10 6 4 2 1 .0001 .0004 .001 .002 .004 .01 .0002 .02 .04 1 2 4 10 20 40 100 JUNCTION TO LEAD NOTE: (1) LEAD TEMPERATURE MEASURED AT THE WIDEST PORTION OF THE SCR ANODE LEAD (2) AMBIENT TEMPERATURE MEASURED AT A POINT 1/2" FROM THE DEVICE JUNCTION TO AMBIENT
1000 500
1K
10K
100 50
27K 56K VAK = 50V
10
-40
-20
0
20
40
60
80
100
TIME (SECONDS)
TA - AMBIENT TEMPERATURE (C)
Figure 9. Off-State Forward Current vs. Temperature
10,000 5000 ID - NORMALIZED FORWARD CURRENT (OFF STATE)
NORMALIZED TO VAK +50V TA +25C
Figure 10. On-State Current vs. Maximum Allowable Temperature
100 90 80 70 60 50 40 30 20 10
AMBIENT TEMP HALF-SINE WAVE AVGERAGE AMBIENT TEMP DC CURRENT ANODE LEAD TEMP 1/2 SINE WAVE AVERAGE ANODE LEAD TEMP DC CURRENT
1000 500
100 50
10 5
400V
50V
MAXIMUM ALLOWABLE TEMPERATURE (C)
0.2
0.4
0.6
08
10
ON-STATE CURRENT (AMPERES) 1 0 25 50 75 100
TA - AMBIENT TEMPERATURE (C)
Figure 12. On-State Characteristics
2 1 .8 .6 IT - ON-STATE CURRENT (AMPERES) .4
Figure 11. dv/dt vs. Temperature
dV/dI - CRITICAL RATE OF RISE APPLIED FORWARD VOLTAGE ( Volt/ sec) 1000 500
100
RGK = 300
.2
50
1K
.01 .08 .06
JUNCTION TEMPERATURE = 25C
10 5
.04
JUNCTION TEMPERATURE = 100C
.-2 .01
1.0 .5
10K 27K 56K
INCREASES TO FORWARD BREAKOVER VOLTAGE
0
10
20
30
40
VT - ON-STATE VOLTAGE (VOLTS) 25 50 75 100 TA - AMBIENT TEMPERATURE (C)
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4N39
+100 V AC Vp = 800 Volts tp = .010 Seconds f = 25 Hertz TA = 25 C DUT + Vp Vp .63 Vp tp dV / dt EXPONENTIAL RAMP GEN. 10 K OSCILLOSCOPE H 100
4N40
Fig. 13 Coupled dv/dt - Test Circuit
TYPICAL APPLICATIONS
10A, T2L COMPATIBLE, SOLID STATE RELAY Use of the 4N40 for high sensitivity, 5300 V isolation capability, provides this highly reliable solid state relay design. This design is compatible with 74, 74S and 74H series T2L logic systems inputs and 220V AC loads up to 10A.
47 470 +5V 4N40 "COIL" SC1460 56K 0.1 F "CONTACT" 220 V AC 100 LOAD
IN5060 (4)
47 INDICATER LAMP
25W, LOGIC INDICATOR LAMP DRIVER The high surge capability and non-reactive input characteristics of the 4N40 allow it to directly couple, without buffers, T2L and DTL logic to indicator alarm devices, without danger of introducing noise and logic glitches.
470 +5V 4N40
LOGIC INPUT 56K
100 220 V AC 0.1 F
400V SYMMETRICAL TRANSISTOR COUPLER Use of the high voltage PNP portion of the 4N40 provides a 400V transistor capable of conducting positive and negative signals with current transfer ratios of over 1%. This function is useful in remote instrumentation, high voltage power supplies and test equipment. Care should be taken not to exceed the 40mW power dissipation rating when used at high voltages.
4N40 INPUT OUTPUT
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4N39 Package Dimensions (Through Hole)
PIN 1 ID.
4N40
Package Dimensions (Surface Mount)
0.350 (8.89) 0.330 (8.38)
0.270 (6.86) 0.240 (6.10)
3
2
1
PIN 1 ID.
0.270 (6.86) 0.240 (6.10) SEATING PLANE 0.350 (8.89) 0.330 (8.38) 0.070 (1.78) 0.045 (1.14) 4 5 6
0.070 (1.78) 0.045 (1.14) 0.200 (5.08) 0.135 (3.43) 0.200 (5.08) 0.165 (4.18) 0.154 (3.90) 0.100 (2.54) 0.020 (0.51) MIN 0.016 (0.40) 0.008 (0.20) 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP 0 to 15 0.300 (7.62) TYP 0.022 (0.56) 0.016 (0.41) 0.020 (0.51) MIN 0.100 (2.54) TYP
0.300 (7.62) TYP
0.016 (0.41) 0.008 (0.20)
0.016 (0.40) MIN 0.315 (8.00) MIN 0.405 (10.30) MAX
Lead Coplanarity : 0.004 (0.10) MAX
Package Dimensions (0.4"Lead Spacing)
Recommended Pad Layout for Surface Mount Leadform
0.270 (6.86) 0.240 (6.10)
0.070 (1.78)
0.060 (1.52)
0.350 (8.89) 0.330 (8.38) 0.070 (1.78) 0.045 (1.14)
0.415 (10.54)
0.100 (2.54) 0.030 (0.76)
SEATING PLANE
0.295 (7.49)
0.200 (5.08) 0.135 (3.43)
0.154 (3.90) 0.100 (2.54)
0.004 (0.10) MIN
0.016 (0.40) 0.008 (0.20)
0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP
0 to 15 0.400 (10.16) TYP
NOTE All dimensions are in inches (millimeters)
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4N39 ORDERING INFORMATION
Option
S SD W 300 300W 3S 3SD
4N40
Order Entry Identifier
.S .SD .W .300 .300W .3S .3SD
Description
Surface Mount Lead Bend Surface Mount; Tape and reel 0.4" Lead Spacing VDE 0884 VDE 0884, 0.4" Lead Spacing VDE 0884, Surface Mount VDE 0884, Surface Mount, Tape & Reel
Carrier Tape Specifications ("D" Taping Orientation)
12.0 0.1 4.85 0.20 4.0 0.1 0.30 0.05 4.0 0.1 O1.55 0.05 1.75 0.10
7.5 0.1 13.2 0.2 16.0 0.3 9.55 0.20
0.1 MAX
10.30 0.20
O1.6 0.1
User Direction of Feed
NOTE All dimensions are millimeters
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MARKING INFORMATION
1
4N39 V XX YY K
3 4 5
2 6
Definitions
1 2 3 4 5 6 Fairchild logo Device number VDE mark (Note: Only appears on parts ordered with VDE option - See order entry table) Two digit year code, e.g., `03' Two digit work week ranging from `01' to `53' Assembly package code
Reflow Profile (Black Package, No Suffix)
300 Temperature (C) 250 200 150 100 50 0 0 0.5 1 1.5 2 2.5 3 225 C peak
215C, 10-30 s
Time above 183C, 60-150 sec
Ramp up = 3C/sec 3.5 4 4.5
* Peak reflow temperature: 225C (package surface temperature) * Time of temperature higher than 183C for 60-150 seconds * One time soldering reflow is recommended
Time (Minute)
TRADEMARKS
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DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I13

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